cop0.h File Reference

N64 COP0 Interface. More...

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Macros
#define	C0_COUNT()
	Read the COP0 Count register (see also TICKS_READ).
#define	C0_WRITE_COUNT(x)
	Write the COP0 Count register.
#define	C0_COMPARE()
	Read the COP0 Compare register.
#define	C0_WRITE_COMPARE(x)
	Write the COP0 Compare register.
#define	C0_STATUS()
	Read the COP0 Status register.
#define	C0_WRITE_STATUS(x)
	Write the COP0 Status register.
#define	C0_CAUSE()
	Returns the COP0 register $13 (Cause Register)
#define	C0_WRITE_CAUSE(x)
	Write the COP0 register $13 (Cause register)
#define	C0_BADVADDR()
	Returns the COP0 register $8 (BadVAddr)
#define	C0_EPC()
	Read the COP0 register $14 (EPC)
#define	C0_INDEX()
	Read the COP0 INDEX register.
#define	C0_WRITE_INDEX(x)   asm volatile("mtc0 %0,$0; nop; nop"::"r"(x))
	Write the COP0 INDEX register.
#define	C0_ENTRYHI()
	Read the COP0 ENTRYHI register.
#define	C0_WRITE_ENTRYHI(x)   asm volatile("mtc0 %0,$10; nop; nop"::"r"(x))
	Write the COP0 ENTRYHI register.
#define	C0_ENTRYLO0()
	Read the COP0 ENTRYLO0 register.
#define	C0_WRITE_ENTRYLO0(x)   asm volatile("mtc0 %0,$2; nop; nop"::"r"(x))
	Write the COP0 ENTRYLO0 register.
#define	C0_ENTRYLO1()
	Read the COP0 ENTRYLO1 register.
#define	C0_WRITE_ENTRYLO1(x)   asm volatile("mtc0 %0,$3; nop; nop"::"r"(x))
	Write the COP0 ENTRYLO1 register.
#define	C0_PAGEMASK()
	Read the COP0 PAGEMASK register.
#define	C0_WRITE_PAGEMASK(x)   asm volatile("mtc0 %0,$5; nop; nop"::"r"(x))
	Write the COP0 PAGEMASK register.
#define	C0_WIRED()
	Read the COP0 WIRED register.
#define	C0_WATCHLO()
	Read the COP0 WATCHLO register.
#define	C0_WRITE_WATCHLO(x)   asm volatile("mtc0 %0,$18"::"r"(x))
	Write the COP0 WATCHLO register.
#define	C0_WRITE_WIRED(x)   asm volatile("mtc0 %0,$6; nop; nop"::"r"(x))
	Write the COP0 WIRED register.
#define	C0_STATUS_IE   0x00000001
	Status: interrupt enable.
#define	C0_STATUS_EXL   0x00000002
	Status: within exception.
#define	C0_STATUS_ERL   0x00000004
	Status: within error.
#define	C0_CAUSE_BD   0x80000000
	Cause: exception triggered in delay slot.
#define	C0_CAUSE_CE   0x30000000
	Cause: coprocessor exception.
#define	C0_CAUSE_EXC_CODE   0x0000007C
	Cause: exception code.
#define	C0_INTERRUPT_0   0x00000100
	Status/Cause: SW interrupt 0.
#define	C0_INTERRUPT_1   0x00000200
	Status/Cause: SW interrupt 1.
#define	C0_INTERRUPT_2   0x00000400
	Status/Cause: HW interrupt 2 (RCP)
#define	C0_INTERRUPT_3   0x00000800
	Status/Cause: HW interrupt 3 (CART)
#define	C0_INTERRUPT_4   0x00001000
	Status/Cause: HW interrupt 4 (PRENMI)
#define	C0_INTERRUPT_5   0x00002000
	Status/Cause: HW interrupt 5.
#define	C0_INTERRUPT_6   0x00004000
	Status/Cause: HW interrupt 6.
#define	C0_INTERRUPT_7   0x00008000
	Status/Cause: HW interrupt 7 (Timer)
#define	C0_INTERRUPT_RCP   C0_INTERRUPT_2
	Status/Cause: HW interrupt 2 (RCP)
#define	C0_INTERRUPT_CART   C0_INTERRUPT_3
	Status/Cause: HW interrupt 3 (CART)
#define	C0_INTERRUPT_PRENMI   C0_INTERRUPT_4
	Status/Cause: HW interrupt 4 (PRENMI)
#define	C0_INTERRUPT_TIMER   C0_INTERRUPT_7
	Status/Cause: HW interrupt 7 (Timer)
#define	C0_GET_CAUSE_CE(cr)   (((cr) & C0_CAUSE_CE) >> 28)
	Get the CE value from the COP0 status register.
#define	C0_GET_CAUSE_EXC_CODE(sr)   (((sr) & C0_CAUSE_EXC_CODE) >> 2)
	Get the exception code value from the COP0 status register value.
#define	C0_ENTRYLO_GLOBAL   (1<<0)
	ENTRYLO: mapping is global (all ASIDs)
#define	C0_ENTRYLO_VALID   (1<<1)
	ENTRYLO: mapping is active (not disabled)
#define	C0_ENTRYLO_DIRTY   (1<<2)
	ENTRYLO: mapping is writable.
#define	C0_INDEX_PROBE_FAILED   (1<<31)
	INDEX: set when a TLBP probe failed to find a match.
#define	C0_TLBWI()   asm volatile("tlbwi; nop; nop; nop; nop")
	COP0 TLBWI opcode.
#define	C0_TLBWR()   asm volatile("tlbwr; nop; nop; nop; nop")
	COP0 TLBWR opcode.
#define	C0_TLBR()   asm volatile("tlbr; nop; nop; nop; nop")
	COP0 TLBR opcode.
#define	C0_TLBP()   asm volatile("tlbp; nop; nop; nop; nop")
	COP0 TLBP opcode.

Detailed Description

N64 COP0 Interface.