cop0.h

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#ifndef __LIBDRAGON_COP0_H
#define __LIBDRAGON_COP0_H
 
#include <stdint.h>
 
#define C0_COUNT() ({ \
    uint32_t x; \
    asm volatile("mfc0 %0,$9":"=r"(x)); \
    x; \
})
 
#define C0_WRITE_COUNT(x) ({ \
    asm volatile("mtc0 %0,$9"::"r"(x)); \
})
 
 
#define C0_COMPARE() ({ \
    uint32_t x; \
    asm volatile("mfc0 %0,$11":"=r"(x)); \
    x; \
})
 
#define C0_WRITE_COMPARE(x) ({ \
    asm volatile("mtc0 %0,$11"::"r"(x)); \
})
 
 
#define C0_STATUS() ({ \
    uint32_t x; \
    asm volatile("mfc0 %0,$12":"=r"(x)); \
    x; \
})
 
#define C0_WRITE_STATUS(x) ({ \
    asm volatile("mtc0 %0,$12"::"r"(x)); \
})
 
#define C0_CAUSE() ({ \
    uint32_t x; \
    asm volatile("mfc0 %0,$13" : "=r" (x) : ); \
    x; \
})
 
#define C0_WRITE_CAUSE(x) ({ \
    asm volatile("mtc0 %0,$13"::"r"(x)); \
})
 
/* Alternative version with different naming */
#define C0_CR()        C0_CAUSE()
#define C0_WRITE_CR(x) C0_WRITE_CAUSE(x)
#define C0_BADVADDR() ({ \
    uint64_t x; \
    asm volatile("dmfc0 %0,$8" : "=r" (x) : ); \
    x; \
})
 
#define C0_EPC() ({ \
    uint32_t x; \
    asm volatile("mfc0 %0,$14" : "=r" (x) : ); \
    x; \
})
 
#define C0_INDEX() ({ \
    uint32_t x; \
    asm volatile("mfc0 %0,$0":"=r"(x)); \
    x; \
})
 
#define C0_WRITE_INDEX(x)    asm volatile("mtc0 %0,$0; nop; nop"::"r"(x))
 
 
#define C0_ENTRYHI() ({ \
    uint32_t x; \
    asm volatile("mfc0 %0,$10":"=r"(x)); \
    x; \
})
 
#define C0_WRITE_ENTRYHI(x)  asm volatile("mtc0 %0,$10; nop; nop"::"r"(x))
 
#define C0_ENTRYLO0() ({ \
    uint32_t x; \
    asm volatile("mfc0 %0,$2":"=r"(x)); \
    x; \
})
 
#define C0_WRITE_ENTRYLO0(x) asm volatile("mtc0 %0,$2; nop; nop"::"r"(x))
 
#define C0_ENTRYLO1() ({ \
    uint32_t x; \
    asm volatile("mfc0 %0,$3":"=r"(x)); \
    x; \
})
 
#define C0_WRITE_ENTRYLO1(x) asm volatile("mtc0 %0,$3; nop; nop"::"r"(x))
 
 
#define C0_PAGEMASK() ({ \
    uint32_t x; \
    asm volatile("mfc0 %0,$5":"=r"(x)); \
    x; \
})
 
#define C0_WRITE_PAGEMASK(x) asm volatile("mtc0 %0,$5; nop; nop"::"r"(x))
 
 
#define C0_WIRED() ({ \
    uint32_t x; \
    asm volatile("mfc0 %0,$6":"=r"(x)); \
    x; \
})
 
#define C0_WATCHLO() ({ \
    uint32_t x; \
    asm volatile("mfc0 %0,$18":"=r"(x)); \
    x; \
})
 
#define C0_WRITE_WATCHLO(x) asm volatile("mtc0 %0,$18"::"r"(x))
 
#define C0_WRITE_WIRED(x) asm volatile("mtc0 %0,$6; nop; nop"::"r"(x))
 
/* Deprecated version of macros with wrong naming that include "READ" */
#define C0_READ_CR()         C0_CAUSE()
#define C0_READ_EPC()        C0_EPC()
#define C0_READ_BADVADDR()   C0_BADVADDR()
/* COP0 Status bits definition. Please refer to MIPS R4300 manual. */
#define C0_STATUS_IE        0x00000001      
#define C0_STATUS_EXL       0x00000002      
#define C0_STATUS_ERL       0x00000004      
 
/* COP0 Cause bits definition. Please refer to MIPS R4300 manual. */
#define C0_CAUSE_BD         0x80000000      
#define C0_CAUSE_CE         0x30000000      
#define C0_CAUSE_EXC_CODE   0x0000007C      
 
/* COP0 interrupt bits definition. These are compatible bothwith mask and pending bits. */
#define C0_INTERRUPT_0      0x00000100      
#define C0_INTERRUPT_1      0x00000200      
#define C0_INTERRUPT_2      0x00000400      
#define C0_INTERRUPT_3      0x00000800      
#define C0_INTERRUPT_4      0x00001000      
#define C0_INTERRUPT_5      0x00002000      
#define C0_INTERRUPT_6      0x00004000      
#define C0_INTERRUPT_7      0x00008000      
 
#define C0_INTERRUPT_RCP    C0_INTERRUPT_2  
#define C0_INTERRUPT_CART   C0_INTERRUPT_3  
#define C0_INTERRUPT_PRENMI C0_INTERRUPT_4  
#define C0_INTERRUPT_TIMER  C0_INTERRUPT_7  
 
#define C0_GET_CAUSE_CE(cr) (((cr) & C0_CAUSE_CE) >> 28)
 
#define C0_GET_CAUSE_EXC_CODE(sr) (((sr) & C0_CAUSE_EXC_CODE) >> 2)
 
/* Flag bits valid for COP0 ENTRYLO0/ENTRYLO1 registers */
#define C0_ENTRYLO_GLOBAL      (1<<0)       
#define C0_ENTRYLO_VALID       (1<<1)       
#define C0_ENTRYLO_DIRTY       (1<<2)       
 
/* Flag bits valid for COP0 INDEX register */
#define C0_INDEX_PROBE_FAILED  (1<<31)      
 
 
#define C0_TLBWI()           asm volatile("tlbwi; nop; nop; nop; nop")
 
#define C0_TLBWR()           asm volatile("tlbwr; nop; nop; nop; nop")
 
#define C0_TLBR()            asm volatile("tlbr; nop; nop; nop; nop")
 
#define C0_TLBP()            asm volatile("tlbp; nop; nop; nop; nop")
 
#endif