libdragon
regsinternal.h
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1
6#ifndef __LIBDRAGON_REGSINTERNAL_H
7#define __LIBDRAGON_REGSINTERNAL_H
8
9#include <stdint.h>
10
32typedef struct AI_regs_s {
34 volatile void * address;
38 uint32_t length;
41 uint32_t control;
43 uint32_t status;
48 uint32_t dacrate;
59 uint32_t bitrate;
60} AI_regs_t;
61
66typedef struct MI_regs_s {
68 uint32_t mode;
70 uint32_t version;
72 uint32_t intr;
74 uint32_t mask;
75} MI_regs_t;
76
81typedef struct VI_regs_s {
83 uint32_t control;
87 uint32_t width;
91 uint32_t v_int;
93 uint32_t cur_line;
95 uint32_t timing;
97 uint32_t v_sync;
99 uint32_t h_sync;
101 uint32_t h_sync2;
103 uint32_t h_limits;
105 uint32_t v_limits;
107 uint32_t color_burst;
109 uint32_t h_scale;
111 uint32_t v_scale;
112} VI_regs_t;
113
118typedef struct PI_regs_s {
120 volatile void * ram_address;
122 uint32_t pi_address;
124 uint32_t read_length;
126 uint32_t write_length;
128 uint32_t status;
130 uint32_t dom1_latency;
133 // TODO: add remaining registers
134} PI_regs_t;
135
140typedef struct SI_regs_s {
142 volatile void * DRAM_addr;
144 volatile void * PIF_addr_read;
146 uint32_t reserved1;
148 uint32_t reserved2;
150 volatile void * PIF_addr_write;
152 uint32_t reserved3;
154 uint32_t status;
155} SI_regs_t;
156
161typedef struct SP_regs_s {
163 volatile void * RSP_addr;
165 volatile void * DRAM_addr;
171 uint32_t status;
173 uint32_t rsp_dma_full;
175 uint32_t rsp_dma_busy;
178} SP_regs_t;
179
180#endif
uint32_t cur_line
Current vertical line counter.
Definition: regsinternal.h:93
uint32_t h_limits
Beginning and end of video horizontally.
Definition: regsinternal.h:103
uint32_t color_burst
Beginning and end of color burst in vertical lines.
Definition: regsinternal.h:107
uint32_t dom1_latency
Cartridge domain 1 latency in RCP clock cycles. Requires DMA status bit guards to work reliably.
Definition: regsinternal.h:130
uint32_t v_limits
Beginning and end of video vertically.
Definition: regsinternal.h:105
uint32_t reserved3
Reserved word.
Definition: regsinternal.h:152
uint32_t rsp_dma_full
RSP DMA full.
Definition: regsinternal.h:173
volatile void * DRAM_addr
RDRAM memory address.
Definition: regsinternal.h:165
uint32_t h_sync2
Number of pixels in line, set identically to h_sync.
Definition: regsinternal.h:101
uint32_t status
SI status, including DMA busy and IO busy.
Definition: regsinternal.h:154
uint32_t control
DMA start register. Write a 1 to this register to start playing back an audio sample.
Definition: regsinternal.h:41
uint32_t rsp_write_length
RDP->RDRAM DMA length.
Definition: regsinternal.h:169
uint32_t status
Status of the PI, including DMA busy.
Definition: regsinternal.h:128
uint32_t dom1_pulse_width
Cartridge domain 1 pulse width in RCP clock cycles. Requires DMA status bit guards to work reliably.
Definition: regsinternal.h:132
uint32_t pi_address
Address of data on peripheral.
Definition: regsinternal.h:122
volatile void * address
Pointer to uncached memory buffer of samples to play.
Definition: regsinternal.h:34
volatile void * RSP_addr
RSP memory address (IMEM/DMEM)
Definition: regsinternal.h:163
uint32_t dacrate
Rate at which the buffer should be played.
Definition: regsinternal.h:48
uint32_t v_sync
Number of lines per frame.
Definition: regsinternal.h:97
uint32_t write_length
How much data to write to RAM from the peripheral.
Definition: regsinternal.h:126
uint32_t status
RSP status.
Definition: regsinternal.h:171
uint32_t status
AI status register. Bit 31 is the full bit, bit 30 is the busy bit.
Definition: regsinternal.h:43
uint32_t rsp_semaphore
RSP Semaphore.
Definition: regsinternal.h:177
uint32_t intr
Current interrupts on the system.
Definition: regsinternal.h:72
uint32_t mask
Interrupt mask.
Definition: regsinternal.h:74
void * framebuffer
Pointer to uncached buffer in memory to rasterize.
Definition: regsinternal.h:85
uint32_t v_scale
Vertical scaling factor from buffer to screen.
Definition: regsinternal.h:111
uint32_t v_int
Vertical interrupt control register. Controls which horizontal line must be hit to generate a VI inte...
Definition: regsinternal.h:91
uint32_t width
Width of the buffer in pixels.
Definition: regsinternal.h:87
uint32_t bitrate
Half-rate at which each single bit of a sample is shifted into the DAC.
Definition: regsinternal.h:59
uint32_t length
Size in bytes of the buffer to be played. Should be number of stereo samples * 2 * sizeof( uint16_t )
Definition: regsinternal.h:38
volatile void * PIF_addr_write
Address to write when copying to PIF RAM.
Definition: regsinternal.h:150
uint32_t rsp_read_length
RDRAM->RSP DMA length.
Definition: regsinternal.h:167
volatile void * ram_address
Uncached address in RAM where data should be found.
Definition: regsinternal.h:120
uint32_t control
VI control register. Sets up various rasterization modes.
Definition: regsinternal.h:83
volatile void * DRAM_addr
Uncached address in RAM where data should be found.
Definition: regsinternal.h:142
uint32_t h_scale
Horizontal scaling factor from buffer to screen.
Definition: regsinternal.h:109
volatile void * PIF_addr_read
Address to read when copying from PIF RAM.
Definition: regsinternal.h:144
uint32_t rsp_dma_busy
RSP DMA busy.
Definition: regsinternal.h:175
uint32_t reserved2
Reserved word.
Definition: regsinternal.h:148
uint32_t reserved1
Reserved word.
Definition: regsinternal.h:146
uint32_t timing
Timing generation register for PAL/NTSC signals.
Definition: regsinternal.h:95
uint32_t read_length
How much data to read from RAM into the peripheral.
Definition: regsinternal.h:124
uint32_t version
Version register.
Definition: regsinternal.h:70
uint32_t mode
Mode register.
Definition: regsinternal.h:68
uint32_t h_sync
Number of pixels in line and leap pattern.
Definition: regsinternal.h:99
Register definition for the AI interface.
Definition: regsinternal.h:32
Register definition for the MI interface.
Definition: regsinternal.h:66
Register definition for the PI interface.
Definition: regsinternal.h:118
Register definition for the SI interface.
Definition: regsinternal.h:140
Register definition for the SP interface.
Definition: regsinternal.h:161
Register definition for the VI interface.
Definition: regsinternal.h:81