regsinternal.h

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#ifndef __LIBDRAGON_REGSINTERNAL_H
#define __LIBDRAGON_REGSINTERNAL_H
 
#include <stdint.h>
 
typedef struct AI_regs_s {
    volatile void * address;
    uint32_t length;
    uint32_t control;
    uint32_t status;
    uint32_t dacrate;
    uint32_t bitrate;
} AI_regs_t;
 
typedef struct VI_regs_s {
    uint32_t control;
    void * framebuffer;
    uint32_t width;
    uint32_t v_int;
    uint32_t cur_line;
    uint32_t timing;
    uint32_t v_sync;
    uint32_t h_sync;
    uint32_t h_sync2;
    uint32_t h_limits;
    uint32_t v_limits;
    uint32_t color_burst;
    uint32_t h_scale;
    uint32_t v_scale;
} VI_regs_t;
 
typedef struct PI_regs_s {
    volatile void * ram_address;
    uint32_t pi_address;
    uint32_t read_length;
    uint32_t write_length;
    uint32_t status;
    uint32_t dom1_latency;
    uint32_t dom1_pulse_width;
    // TODO: add remaining registers
} PI_regs_t;
 
typedef struct SI_regs_s {
    volatile void * DRAM_addr;
    volatile void * PIF_addr_read;
    uint32_t reserved1;
    uint32_t reserved2;
    volatile void * PIF_addr_write;
    uint32_t reserved3;
    uint32_t status;
} SI_regs_t;
 
typedef struct SP_regs_s {
    volatile void * RSP_addr;
    volatile void * DRAM_addr;
    uint32_t rsp_read_length;
    uint32_t rsp_write_length;
    uint32_t status;
    uint32_t rsp_dma_full;
    uint32_t rsp_dma_busy;
    uint32_t rsp_semaphore;
} SP_regs_t;
 
#endif