6#ifndef __LIBDRAGON_DMA_H
7#define __LIBDRAGON_DMA_H
15void dma_write_raw_async(
const void *ram_address,
unsigned long pi_address,
unsigned long len);
16void dma_write(
const void * ram_address,
unsigned long pi_address,
unsigned long len);
18void dma_read_raw_async(
void *ram_address,
unsigned long pi_address,
unsigned long len);
19void dma_read_async(
void *ram_address,
unsigned long pi_address,
unsigned long len);
20void dma_read(
void * ram_address,
unsigned long pi_address,
unsigned long len);
25uint32_t
io_read(uint32_t pi_address);
28void io_write(uint32_t pi_address, uint32_t data);
32__attribute__((deprecated(
"use dma_wait instead")))
void dma_read_async(void *ram_address, unsigned long pi_address, unsigned long len)
Start reading data from a peripheral through PI DMA.
Definition: dma.c:281
void dma_write_raw_async(const void *ram_address, unsigned long pi_address, unsigned long len)
Start writing data to a peripheral through PI DMA (low-level)
Definition: dma.c:168
uint32_t io_read(uint32_t pi_address)
Read a 32 bit integer from a peripheral using the CPU.
Definition: dma.c:435
void dma_read(void *ram_address, unsigned long pi_address, unsigned long len)
Read data from a peripheral through PI DMA, waiting for completion.
Definition: dma.c:390
bool io_accessible(uint32_t pi_address)
Check whether the specified PI address can be accessed doing I/O from CPU.
Definition: dma.c:80
void dma_write(const void *ram_address, unsigned long pi_address, unsigned long len)
Write to a peripheral.
Definition: dma.c:415
void dma_wait(void)
Wait until an async DMA or I/O transfer is finished.
Definition: dma.c:366
volatile int dma_busy(void)
Return whether the DMA controller is currently busy.
Definition: dma.c:107
void io_write(uint32_t pi_address, uint32_t data)
Write a 32 bit integer to a peripheral using the CPU.
Definition: dma.c:463
void dma_read_raw_async(void *ram_address, unsigned long pi_address, unsigned long len)
Start reading data from a peripheral through PI DMA (low-level)
Definition: dma.c:132